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| CN0292 工业级四路数据采集系统方案 |
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| 文章来源： 更新时间：2015/1/21 10:49:00 |
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ADI公司的CN0292是全隔离的工业级四路数据采集系统,主要采用AD7176-2高分辨率24位Sigma-Delta ADC,AD8476全差分输入和输出放大器, ADA4096-4四路运算出放大器, ADA4898-1超低功耗运算放大器, ADG1204模拟复接器以及ADP1720低压降线性稳压器,主要用在仪表,PLC/分布控制系统,测试和测量.本文介绍了工业级四路数据采集系统主要电路描述,电路框图, 测试建立功能框图,详细电路图,材料清单和PCB设计文件.
The circuit in Figure 1 is a completely isolated, robust, industrial, 4-channel data acquisition system that provides 16-bit, noise free code resolution and an automatic channel switching rate of up to 42 kSPS. The channel to channel crosstalk at 42 kSPS switching is less than 15 ppm FS (less than −90 dB) because of the unique selection of fast settling components in the multiplexed signal chain. The circuit acquires and digitizes standard industrial signal levels of ±5 V, ±10 V, 0 V to 10 V, and 0 mA to 20 mA. The input buffers also provide overvoltage protection, thereby eliminating the leakage errors associated with conventional Schottky diode protection circuits.
Applications for the circuit include process control (PLC/DCS modules), battery testing, scientific multichannel instrumentation, and chromatography.
图1. CN0292四路数据采集系统功能框图
图2.EVAL-CN0292-SDZ评估板和EVAL-SDP-CB1Z SDP的连接图
CN0292四路数据采集系统应用:
Instrumentation
Programmable Logic Controllers/ Distributed Control Systems
Electronic Test & Measurement
工业级四路数据采集系统主要电路描述
Signal Path
Four channels of input signals are buffered by the ADA4096-4, a quad, rail-to-rail, input/output op amp featuring overvoltage protection against phase reversal or latch-up for inputs of up to 32 V above or below the ±15 V supply rails, which eliminates the need for additional overvoltage protection circuitry.
The inputs are designed for typical low frequency, industrial signals of ±10 V. The input buffers provide a high impedance to the sources and isolate the inputs from the multiplexer switching transients.
The RC networks on the inputs of the buffers (10 Ω/10 nF) have a bandwidth of 1.6 MHz and provide high frequency noise filtering.
The RC networks on the outputs of the ADA4096-4 (47 Ω/47 nF) isolate the buffers from the multiplexer switching transients. Figure 2 shows an equivalent circuit. The drain capacitor, CD, must be charged by the input voltage before switching to the next channel. There can be as much as 20 V between channels, and a transient current is generated when the multiplexer switches to the next channel.
The ADG1204 multiplexer, featuring low drain capacitance(<4 pF), minimizes the kickback charge.
The output of the multiplexer is buffered by an ADA4898-1 op amp to prevent loading errors due to the on resistance of the switches. The ADA4898-1 is unity-gain stable, settles to 0.1% in less than 85 ns, and has only 0.9 nV/√Hz of input voltage noise. The worst-case input signal to the buffer is a ±10 V, 21 kHz square wave when two adjacent channels have full-scale positive and full-scale negative voltages on their respective inputs.
The RC network on the input of the ADA4898-1 (1.8 kΩ/68 pF) has a bandwidth of 1.3 MHz and acts as a wideband noise filter. The time constant of this filter is 122 ns, and the 16-bit settling time is achieved in approximately 1.34 μs (~11 time constants).
The output of the ADA4898-1 buffer drives the AD8475 precision differential funnel amplifier that converts the bipolar, single-ended ±10 V signal into a ±4 V differential signal centered on a common-mode voltage of 2.5 V. With integrated, trimmed, and matched precision resistors configured to a gain of 0.4×, the AD8475 can accept up to ±12.5 V inputs operating on a single 5 V supply. The common-mode voltage is supplied by the REFOUT pin (2.5 V) of the AD7176-2 ADC.The differential input range of the AD7176-2 is set to ±5 V by the ADR4550 5 V reference.
The AD7176-2 operates both as an ADC and as a multiplexer controller. Enabling the MUX_IO bit causes the GPIO pins in the AD7176-2 to toggle in synchronization with the sequencing and conversion of the ADC channels; therefore, the channel change is synchronized with the ADC, eliminating any need for external synchronization. The GPIO pins save two control lines to the digital interface that are otherwise needed to control the multiplexer.
A programmable conversion delay from 0 μs to 1 ms can be configured in the AD7176-2. The conversion delay is the delay between each channel change (controlled by the GPIO bits) and the start of a conversion. The delay adjustment allows the multiplexer and conditioning circuits additional settling time.
All the components in the signal path were selected to provide a total minimum settling time that is compatible with the channel switching rate of 42 kSPS. The resulting low frequency crosstalk between channels for full-scale signals is less than −90 dB.
A programmable conversion delay can be inserted between channel switching and start of conversion, thereby allowing maximum settling time for the circuits driving the ADC if further optimization is required.
Digital Isolation and isoPower
The ADuM3471 is a quad channel digital isolator with integrated pulse-width modulation (PWM) controllers and low impedance transformer drivers (X1 and X2). The only additional components required for an isolated dc-to-dc converter are a transformer (Coilcraft KA4976-AL, 1:5 turns ratio, 64 μH primary inductance) and a simple full-wave Schottky diode rectifier (four SD103AW-7-F diodes). The power circuit provides up to 2 W of regulated, isolated power when supplied from a 5 V or 3.3 V input, thereby eliminating the need for a separate isolated dc-to-dc converter.
The iCoupler® chip-scale transformer technology isolates the logic signals, and the integrated transformer driver with isolated secondary side control provides high efficiency for the isolated dc-to-dc converter. The internal oscillator frequency is adjustable from 200 kHz to 1 MHz and is determined by the value of a resistor connected to the OC pin. When the resistor is 100 kΩ, the switching frequency is 500 kHz.
The ADuM3471 regulation is from the positive supply. The feedback for regulation is from a divider network chosen such that the feedback voltage is 1.25 V when the output voltage is 16.76 V. The feedback voltage is compared with the ADuM3471 internal feedback set point of 1.25 V. Regulation is achieved by varying the duty cycle of the PWM signal driving the external transformer.
The ADP7102 LDO regulator regulates the 16.76 V output voltage down to 15 V. The negative unregulated rectified voltage from the transformer is approximately −21 V. The ADP7182 negative regulator is used to provide the regulated −15 V. The regulated ±15 V is then used to power the high voltage components (the ADA4096-4, ADG1204, and ADA4898-1).
图3.测试建立功能框图
图4. CN0292四路数据采集系统电路图(1)
图5. CN0292四路数据采集系统电路图(2)
图6. CN0292四路数据采集系统电路图(3)
图7. CN0292四路数据采集系统电路图(4)
图8. CN0292四路数据采集系统电路图(5)
图9. CN0292四路数据采集系统电路图(6)
图10. CN0292四路数据采集系统PCB设计图:顶层
图11. CN0292四路数据采集系统PCB设计图:第二层
图12. CN0292四路数据采集系统PCB设计图:第三层
图13. CN0292四路数据采集系统PCB设计图:第四层
图14. CN0292四路数据采集系统PCB设计图:顶层元件布局
图15. CN0292四路数据采集系统PCB设计图:底层元件布局
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